The ESP32 integrates a large number of peripherals into a compact module with 30 to 40 accessible pins depending on the variant. Not all pins are equal — some are input-only, some have boot-mode dependencies, and some are reserved for internal flash communication. Knowing these constraints before wiring a circuit saves hours of debugging.
ESP32 Pin Groups Overview
The ESP32-WROOM (the most common variant) exposes pins organized into functional groups:
| Pin Group | Function | Description |
|---|---|---|
| 3V3 | Power | 3.3V output for powering sensors and peripherals |
| GND | Ground | Ground reference |
| EN | Enable | Enables or resets the ESP32 |
| GPIO0 | Boot Mode | Controls boot mode — must be HIGH for normal operation, LOW to enter flash programming mode |
| GPIO Pins | Digital I/O | General-purpose configurable input/output |
| ADC Pins | Analog Input | 18 ADC-enabled pins, 12-bit resolution, 0–3.3V range |
| DAC Pins | Analog Output | GPIO25 and GPIO26, converts digital to analog voltage |
| PWM Pins | PWM | Nearly all GPIOs support PWM via LEDC peripheral |
| SPI Pins | SPI Bus | GPIO12, 13, 14, 15, 2 commonly used for HSPI/VSPI |
| I2C Pins | I2C Bus | GPIO21 (SDA), GPIO22 (SCL) by default |
| UART Pins | Serial | GPIO1 (TX0), GPIO3 (RX0) for UART0 |
| Touch Pins | Capacitive | 10 GPIOs support capacitive touch sensing |
| RTC GPIO Pins | Wake from sleep | GPIOs 0, 2, 4, 12–15, 25–27, 32–39 can wake from deep sleep |
ESP32-WROOM Pinout Diagram
ESP-WROOM-32
+----------+
EN --|EN D23|-- IO23 (SPI_MOSI / VSPI_MOSI)
(SensVP / ADC1_0) I36--|VP D22|-- IO22 (I2C_SCL)
(SensVN / ADC1_3) I39--|VIN TX0|-- IO01 (U0_TXD / CLK3)
(ADC1_6) I34--|D34 RX0|-- IO03 (U0_RXD / CLK2)
(ADC1_7) I35--|D35 D21|-- IO21 (I2C_SDA)
(XTAL32/Touch9/ADC1_4) IO32--|D32 D19|-- IO19 (SPI_MISO / VSPI_MISO)
(XTAL32/Touch8/ADC1_5) IO33--|D33 D18|-- IO18 (SPI_SCK / VSPI_CLK)
(DAC1 / ADC2_8) IO25--|D25 D5|-- IO05 (VSPI_CS)
(DAC2 / ADC2_9) IO26--|D26 TX2|-- IO17 (U2_TXD)
(Touch7 / ADC2_7) IO27--|D27 RX2|-- IO16 (U2_RXD)
(HSPI_CLK/Touch6/ADC2_6) IO14--|D14 D4|-- IO04 (ADC2_0 / Touch0)
(HSPI_MISO/Touch5/ADC2_5) IO12--|D12 D2|-- IO02 (ADC2_2 / Touch2) LED
(HSPI_MOSI/Touch4/ADC2_4) IO13--|D13 D15|-- IO15 (ADC2_3 / Touch3 / HSPI_CS)
GND--|GND GND|-- GND
VIN--|VIN 3V3|-- 3.3V
+----------+
EN BOOT
Pin Restrictions and Boot-Critical Pins
Not all pins behave the same during power-on and boot. Several pins have hardware-defined states at startup that can affect both circuit design and firmware behavior.
Pins to Avoid or Use with Care
| Pin | Restriction | Reason |
|---|---|---|
| GPIO0 | Must be HIGH during boot | Entering LOW puts ESP32 in download mode |
| GPIO1 (TX0) | Do not use for general I/O | Used for UART0 TX (programming and debug) |
| GPIO2 | Must be LOW during boot; connected to onboard LED | Used as boot strapping pin |
| GPIO3 (RX0) | Do not use for general I/O | Used for UART0 RX (programming) |
| GPIO5 | Must be HIGH during boot | Boot strapping pin |
| GPIO6–GPIO11 | Do not use | Connected to internal SPI flash memory |
| GPIO12 | Must be LOW during boot | Controls flash voltage; using it incorrectly can brick the device |
| GPIO15 | Must be HIGH during boot; suppresses startup log if pulled LOW | Boot strapping pin |
Input-Only Pins
Four pins can only be used as inputs — they cannot be configured as outputs and have no internal pull-up or pull-down resistors:
| Pin | Alternate Function |
|---|---|
| GPIO34 | ADC1_CH6 |
| GPIO35 | ADC1_CH7 |
| GPIO36 (VP) | ADC1_CH0, SensVP |
| GPIO39 (VN) | ADC1_CH3, SensVN |
These pins are useful for analog readings and external interrupt sources.
Communication Interface Pin Defaults
UART
| Interface | TX Pin | RX Pin | Notes |
|---|---|---|---|
| UART0 | GPIO1 | GPIO3 | Used for programming and debug output |
| UART1 | GPIO17 | GPIO16 | General-purpose serial |
| UART2 | GPIO17 | GPIO16 | Configurable |
All UART pins are software-remappable on ESP32.
SPI
Two SPI buses are commonly used:
| Bus | MOSI | MISO | CLK | CS | Notes |
| --- | ---- | ---- | --- | -- | ----- |
| VSPI | GPIO23 | GPIO19 | GPIO18 | GPIO5 | Recommended for general use |
| HSPI | GPIO13 | GPIO12 | GPIO14 | GPIO15 | Available but GPIO12/15 have boot constraints |
I2C
| Signal | Default Pin | Configurable |
|---|---|---|
| SDA | GPIO21 | Yes |
| SCL | GPIO22 | Yes |
I2C pins are software-configurable — any GPIO can serve as SDA/SCL in software.
ADC Channels
The ESP32 has two ADC units:
| ADC | Channels | Pins |
|---|---|---|
| ADC1 | 8 channels | GPIO32–GPIO39 |
| ADC2 | 10 channels | GPIO0, 2, 4, 12–15, 25–27 |
Important ADC2 limitation: ADC2 cannot be used while Wi-Fi is active. For analog readings in Wi-Fi-connected projects, use only ADC1 pins.
Touch Sensor Pins
The ESP32 has 10 capacitive touch-enabled pins that can detect a human finger without physical contact:
| Touch Channel | GPIO |
|---|---|
| Touch0 | GPIO4 |
| Touch1 | GPIO0 |
| Touch2 | GPIO2 |
| Touch3 | GPIO15 |
| Touch4 | GPIO13 |
| Touch5 | GPIO12 |
| Touch6 | GPIO14 |
| Touch7 | GPIO27 |
| Touch8 | GPIO33 |
| Touch9 | GPIO32 |
Practical Pin Selection Guide
GPIO for general output? → GPIO4, 16, 17, 18, 19, 21, 22, 23
GPIO for general input? → Any GPIO (use INPUT_PULLUP for buttons)
ADC reading (Wi-Fi active)? → Use ADC1 pins: GPIO32-39
ADC reading (no Wi-Fi)? → ADC1 or ADC2 (except GPIO34-39 input-only)
I2C bus? → GPIO21 (SDA), GPIO22 (SCL)
SPI bus? → GPIO18 (CLK), GPIO19 (MISO), GPIO23 (MOSI), GPIO5 (CS)
UART communication? → GPIO16 (RX), GPIO17 (TX)
PWM output? → Any GPIO (all support LEDC)
Wake from deep sleep? → GPIO0, 2, 4, 12-15, 25-27, 32-39
Capacitive touch? → GPIO4, 13, 14, 15, 27, 32, 33
Final Thoughts
The ESP32 pinout is both powerful and nuanced. The large number of multiplexed functions gives enormous flexibility, but the boot-strapping constraints and the ADC2/Wi-Fi conflict can cause subtle bugs if not understood upfront.
Before designing a circuit or writing GPIO code:
- Check whether the pin has boot constraints
- Verify whether you need ADC1 or ADC2
- Confirm the pin can be configured as output if you need to drive a signal
Understanding the ESP32 pinout is the difference between a circuit that works first try and one that causes mysterious boot failures.