ES: Memory Types and Segments

Memory in embedded systems is organized in a hierarchy based on speed, capacity, and proximity to the CPU, directly affecting performance and determinism.Understanding RAM, Flash, cache, and protection mechanisms is essential for designing efficient, reliable, and secure firmware architectures.

Memory is not just “where data is stored”.

It defines:

  • System performance
  • Power consumption
  • Real-time determinism
  • Security boundaries
  • Cost of the device

In embedded systems, memory architecture is a design decision, not just a programming detail.


What is Memory?

Memory is a hardware component that stores:

  • Instructions (code)
  • Data (variables)
  • Configuration
  • State information

At electrical level, memory stores information as:

md
1 → High voltage
0 → Low voltage

At system level:

md
+-----------------------+
|        CPU            |
|                       |
|  Registers            |
|  ALU                  |
|  Control Unit         |
+-----------+-----------+
            |
            | Address Bus
            | Data Bus
            | Control Bus
            |
+-----------v-----------+
|        Memory         |
|  Code + Data Storage  |
+-----------------------+


The Big Picture – Memory Hierarchy

Memory is not a single block. It is organized in layers based on:

  • Speed
  • Latency (CPU cycles)
  • Capacity
  • Cost per bit

The closer the memory is to the CPU, the faster and smaller it is.

Here is the classical memory hierarchy:

md
            +--------+                 __
           / Register \ 1 Cycle         |
          +------------+                | Primary
	     /    Caches    \ ~10           | Storage
        +----------------+              |
       /   Main Memory    \ ~100        |
      +--------------------+           __
	 /      Flash Disk      \ ~ 1M      |
    +------------------------+          | Secondary
   /     Traditional Disk     \ ~ 10M   | Storage
  +----------------------------+        |
 /   Remote Secondary Storage   \       |
+--------------------------------+     __

<------- Storage Capacity ------->

Register

It is the fastest memory component, it reads and write in 1 CPU cycle because it is on the CPU, volatile memory.

Registers are used directly by the CPU while executing instructions, because it is inside the CPU.

Registers Examples:

  • R0–R12 (General Purpose Registers)
  • Stack Pointer (SP)
  • Link Register (LR)
  • Accumulator (ACC) – stores arithmetic/logic results.
  • Program Counter (PC) – keeps track of the next instruction.
  • Instruction Register (IR) – holds the current instruction.
  • Memory Address Register (MAR) – stores address to access memory.
  • Memory Data Register (MDR) – holds data being transferred to/from memory.
  • General-purpose registers – for temporary data in calculations.

Cache Memory (Smart Acceleration Layer)

Its storage capacity is bigger than Register, but it is slower and it is on the CPU too, volatile memory.

It sits between the CPU and RAM (main memory).

  • It stores frequently accessed data and instructions so the CPU can retrieve them faster than going all the way to RAM.
  • The idea is to reduce the time the CPU takes to get data from memory (called memory access time).
Cache acts like a **buffer or middle layer**, giving the CPU the data it needs much faster.

Cache exists mostly in:

  • Cortex-A
  • High-end Cortex-M7
  • Microprocessors (x86, ARM-A)

Cache stores recently accessed data/instructions.

Types:

  • Instruction Cache (I-Cache)
  • Data Cache (D-Cache)

Access time: ~10 cycles

md
CPU
  |
  v
+---------+
|  Cache  |
+---------+
     |
     v
   RAM

If data is in cache → fast

If not → “cache miss” → fetch from RAM

Embedded challenge:

  • DMA + cache coherency problems
  • Real-time unpredictability
  • Need for cache invalidation

Main Memory (RAM) (Volatile Memory)

RAM - Random Access Memory

Its storage capacity is bigger than Caches, but it is slower than Caches and it is not on the CPU, volatile memory.

Types:

SRAM: Static RAM

It is larger (physical size), consume more power, and smaller in capacity than DRAM.

But it is faster

Used for:

  • Stack
  • Heap
  • Global variables
  • Buffers
  • RTOS tasks
  • DRAM: Dynamic RAM

    it is smaller, and slower than SRAM.

    But it has more capacity, consume less power.

    Used in:

  • Embedded Linux
  • Cortex-A systems
  • Raspberry Pi
  • x86 systems

Each bit = capacitor:

md
Charged   → 1
Discharged → 0

Needs periodic refresh or data is lost.


Flash Disk (ROM) (Non-Volatile Memory)

ROM - Read Only Memory

Its storage capacity is bigger than RAM but slower, and it is non-volatile

Types:

  • MROM: Maskable ROM, and can not be programmed
  • PROM: Programmable ROM, and can be programmed once.
  • EPROM: Erasable PROM, it can be erased using UV and reprogrammed.
  • EEPROM: Electrically EPROM, it can be electrically erase and reprogrammed.
  • Flash: It is EEPROM with larger page size.

Flash is the heart of firmware storage.

Access time: ~1M cycles (relative to registers)

Flash stores:

  • Bootloader
  • Application firmware
  • Interrupt vector table
  • Constant data

md
Flash
+----------------------+
| Bootloader           |
+----------------------+
| Application          |
+----------------------+
| Read-only constants  |
+----------------------+

Important properties:

  • Erase by sector
  • Limited write cycles
  • Slower write than read

Secondary Storage

Not all embedded systems have disks.

But advanced systems (Linux-based) may use:

  • eMMC
  • SD card
  • NAND Flash
  • SSD

These correspond to the lower layers in the hierarchy diagram.

md
CPU
  |
  v
RAM
  |
  v
eMMC / NAND
  |
  v
Cloud / Remote Storage

As storage capacity increases:

  • Speed decreases
  • Latency increases
  • Security risk increases
  • Traditional Disk (HDD)

    Its storage capacity is bigger than Flash disk but slower, and it is non-volatile.

Remote Secondary Storage

Its storage capacity is bigger than Traditional disk, but slower, and depends on the network speed.

Connected via:

  • SPI
  • QSPI
  • FMC
  • DDR interface

Memory Segments (Software View)

When you compile firmware, memory is divided logically:

md
+----------------------+
| Text (.text)         | → Code (Flash)
+----------------------+
| Read Only (.rodata)  | → Flash
+----------------------+
| Data (.data)         | → SRAM (init from Flash)
+----------------------+
| BSS (.bss)           | → SRAM (zero init)
+----------------------+
| Heap                 |
+----------------------+
| Stack                |
+----------------------+

Controlled by:

  • Linker script
  • Startup code

Memory Protection

MPU – Memory Protection Unit

Allows defining:

  • Read-only region
  • No-execute region
  • Privileged region

Example:

md
Region 1: Flash (Read + Execute)
Region 2: SRAM (Read + Write)
Region 3: Peripheral (Read + Write)
Region 4: No-Execute

Prevents:

  • Stack execution
  • Buffer overflow exploitation
  • Code injection

Memory Management Unit (MMU)

Found in:

  • Cortex-A
  • x86
  • Linux systems

Provides:

  • Virtual memory
  • Paging
  • Process isolation

md
Virtual Address
      |
      v
     MMU
      |
      v
Physical DRAM


Embedded Memory vs Desktop Memory

FeatureMCUMPU
Internal FlashYesNo
Internal SRAMYesLimited
DRAMRareYes
MMUNoYes
DeterministicHighLower

Embedded systems prioritize:

  • Predictability
  • Determinism
  • Power efficiency

Desktops prioritize:

  • Capacity
  • Virtualization
  • Multi-process isolation