ES: Microcontroller Fundamentals

A microcontroller is not just “a small CPU”. It is a self-contained computing system integrated inside a single silicon die, optimized for deterministic control, low power consumption, and real-time execution.

Unlike general-purpose processors, an MCU is designed to:

  • Interact directly with hardware pins
  • Control physical systems
  • Run without an operating system
  • Operate under strict power and timing constraints

MCU vs MPU

FeatureMCUMPU
Integrated RAM✅ Yes❌ External
Integrated Flash✅ Yes❌ External
OS Required❌ Not required✅ Usually Linux
Power ConsumptionVery LowHigher
ExampleSTM32, AVRRaspberry Pi SoC

Think of it this way:

md
MPU System
----------
CPU  --> External RAM
     --> External Flash
     --> External Peripherals

MCU System
----------
[ CPU + RAM + Flash + Peripherals ]  (Single Chip)


MCU Internal Architecture

At the highest abstraction level, a microcontroller looks like this:

md
+------------------------------------------------------+
|                     MCU CHIP                         |
|                                                      |
|  +--------+     +-----------------+                  |
|  |  CPU   |<--->| Bus Matrix      |<-----+           |
|  +--------+     +-----------------+      |           |
|        |                 |               |           |
|        v                 v               v           |
|     Flash              SRAM         Peripherals      |
|                                          |           |
|                              +-----------+-------+   |
|                              | UART SPI I2C ADC  |   |
|                              +-----------+-------+   |
|                                          |           |
|                                      GPIO Pins       |
+------------------------------------------------------+

Every instruction executed by the CPU travels through this internal fabric.

Key idea:

The MCU is essentially a mini SoC (System on Chip).

Core components:

  • ALU
  • Register bank (R0–R15)
  • Stack Pointer (MSP/PSP)
  • Program Counter
  • NVIC (Nested Vector Interrupt Controller)
  • SysTick timer
  • Optional MPU (Memory Protection Unit)

MCU Architecture Models

Von Neumann

In Von Neumann architecture:

Code and Data share the SAME memory and SAME bus.

There is only one memory space, and one path between CPU and memory.

md
+-------------+
|     CPU     |
+------+------+
	   |
	   |  (Single Bus)
	   |
+------+------+
|   Memory    |
| (Code+Data) |
+-------------+

Instruction Execution:

md
Step 1: Fetch Instruction
Step 2: Fetch Data
Step 3: Execute

But notice:

Instruction and data cannot be fetched at the same time.

This is called:

Von Neumann Bottleneck

Harvard

In Harvard architecture:

Code and Data have separate memory AND separate buses.

Two independent paths.

md
                +-------------+
                |     CPU     |
                +------+------+
                       |
        +--------------+--------------+
        |                             |
 Instruction Bus                Data Bus
        |                             |
   +----+----+                   +----+----+
   | Program |                   |  Data   |
   | Memory  |                   | Memory  |
   +---------+                   +---------+

Instruction Execution

md
CPU fetches instruction
AND
Reads/writes data simultaneously

Parallel operations possible.

  • Most microcontrollers
  • DSP processors
  • Embedded systems requiring determinism

Example:

Many AVR MCUs follow Harvard model.

Modified Harvard (Hybrid)

This is the most important for modern systems.

Most modern MCUs use this model.

md
                +-------------+
                |     CPU     |
                +------+------+
                       |
        +--------------+--------------+
        |                             |
 Instruction Bus                Data Bus
        |                             |
        +------------+----------------+
                     |
               Unified Address Space
                     |
         +-----------+-----------+
         |                       |
      Flash                    SRAM

Modified Harvard means:

  • Separate instruction and data buses
  • But unified memory map

In other words:

Architecturally separated, logically unified.

Because:

  • You want performance of Harvard
  • But flexibility of unified memory

Modern ARM Cortex-M uses this.

md
                CPU
                 |
         +-------+-------+
         |               |
      I-BUS            D-BUS
         |               |
      Flash             SRAM

But both appear in same address space.

Example memory map:

md
0x08000000  → Flash
0x20000000  → SRAM
0x40000000  → Peripherals

Single 32-bit address space.

Advantages

  • Parallel instruction/data access
  • Unified addressing model
  • Simplifies programming
  • High performance

Security:

Since Flash is usually: Read-Only + Executable

And SRAM is: Read-Write + Non-Executable

Modern MCUs can implement:

  • Execute Never (XN)
  • Memory Protection Unit (MPU)

This makes hybrid architecture ideal for embedded security.


MCU Types

md
Microcontrollers (MCUs)
│
├── Based on Data Width
│   │
│   ├── 8-bit
│   │     ├─ Simple ALU
│   │     ├─ Small Flash/RAM
│   │     └─ Low-cost applications
│   │
│   ├── 16-bit
│   │     ├─ Moderate performance
│   │     ├─ Better math capability
│   │     └─ Industrial sensors
│   │
│   └── 32-bit
│         ├─ High performance
│         ├─ DSP / FPU support
│         ├─ Large memory space
│         └─ Modern IoT / Automotive
│
├── Based on Architecture Model
│   │
│   ├── Harvard
│   │     ├─ Separate program/data memory
│   │     └─ Faster execution
│   │
│   ├── Von Neumann
│   │     ├─ Shared memory
│   │     └─ Simpler design
│   │
│   └── Modified Harvard
│         ├─ Separate buses
│         └─ Unified memory map
│
├── Based on Application Domain
│   │
│   ├── General Purpose MCU
│   │     ├─ GPIO / UART / SPI
│   │     └─ Wide usage
│   │
│   ├── Automotive MCU
│   │     ├─ Lockstep cores
│   │     ├─ ECC memory
│   │     └─ ISO 26262 compliance
│   │
│   ├── Wireless MCU
│   │     ├─ WiFi / BLE integrated
│   │     └─ IoT applications
│   │
│   └── Industrial / Safety MCU
│         ├─ Redundant watchdogs
│         └─ High reliability
│
└── Based on Integration Level
│   │
│   ├── Basic MCU
│   │     ├─ CPU + Flash + SRAM
│   │     └─ Basic peripherals
│   │
│   ├── Advanced MCU
│   │     ├─ DMA
│   │     ├─ Crypto engine
│   │     └─ High-speed bus matrix
│   │
│   └── SoC-style MCU
│         ├─ Multi-core
│         ├─ External memory interface
│         └─ Advanced connectivity
│
└── Based on Security Features
    │
    ├── No Hardware Security
    │     └─ Basic protection only
    │
    ├── MPU-enabled MCU
    │     ├─ Memory region protection
    │     └─ Privilege separation
    │
    ├── Secure Boot MCU
    │     ├─ Firmware signature verification
    │     └─ Anti-rollback protection
    │
    └── TrustZone-enabled MCU
          ├─ Secure world / Non-secure world
          └─ Hardware root of trust

Based on Data Width

8-bit Microcontrollers

These are simple architectures where ALU processes 8 bits per cycle.

md
+----------------+
| 8-bit ALU      |
| 8-bit Registers|
+----------------+

Characteristics:

  • Limited RAM (1–8 KB typical)
  • Very small Flash
  • Simple instruction set
  • Minimal security features

Used for:

  • Simple control logic
  • Low-cost products

Security level:

Very low – no MPU, no secure boot.

Examples:

  • ATmega328P
  • → Used in Arduino Uno

    → 32KB Flash, 2KB SRAM

  • PIC16F877A
  • → Industrial control

  • Intel 8051
  • → Classic architecture still used in simple embedded systems

Used in:

  • Remote controls
  • Toys
  • Simple automation

16-bit Microcontrollers

Better performance, still low power.

md
+-------------------+
| 16-bit ALU        |
| 16-bit Registers  |
+-------------------+

Often used in:

  • Industrial measurement
  • Smart sensors

Security:

Limited memory isolation.

Examples:

  • ATmega328P
  • → Used in Arduino Uno

    → 32KB Flash, 2KB SRAM

  • PIC16F877A
  • → Industrial control

  • Intel 8051
  • → Classic architecture still used in simple embedded systems

Used in:

  • Remote controls
  • Toys
  • Simple automation

32-bit Microcontrollers

Now we enter Cortex-M class.

md
+------------------------+
| 32-bit ALU             |
| 32-bit Registers       |
| Pipeline Execution     |
| Optional FPU           |
| Optional MPU           |
+------------------------+

Capabilities:

  • Large memory addressing
  • DMA engines
  • Advanced bus matrix
  • Security extensions (TrustZone in M33)

Examples:

  • STM32F4
  • → Cortex-M4 core

    → FPU, DSP

  • ESP32
  • → Integrated WiFi + BLE

  • LPC1768 (NXP)
  • nRF52840 (Nordic)

Used in:

  • IoT devices
  • Automotive modules
  • Medical devices

MCU Internal Architecture (All Major Units)

md
+-------------------------------------------------------------------------------+
|                                   MCU CHIP                                    |
|                                                                               |
|  +---------------------------+                                                |
|  |         CPU CORE          |                                                |
|  |---------------------------|                                                |
|  |  ALU  | Register File     |                                                |
|  |  PC   | SP  | LR          |                                                |
|  |  PSR  | Control Unit      |                                                |
|  |---------------------------|                                                |
|  |  MPU (Memory Protection)  |                                                |
|  |  FPU (Optional)           |                                                |
|  |  NVIC (Interrupt Ctrl)    |                                                |
|  +------------+--------------+                                                |
|               |                                                               |
|              AHB  (Advanced High-performance Bus)                             |
|               |                                                               |
|   +-----------+------------+------------+-------------+                       |
|   |                        |            |             |                       |
|   v                        v            v             v                       |
|+--------+            +----------+   +--------+   +-----------+                |
|| Flash  |            |  SRAM    |   |  DMA   |   | Debug Unit|                |
||(Code)  |            |(Data)    |   | Engine |   | SWD/JTAG  |                |
|+--------+            +----------+   +--------+   +-----------+                |
|                                                                               |
|                                  |                                            |
|                           AHB/APB Bridge                                      |
|                                  |                                            |
|                                 APB  (Advanced Peripheral Bus)                |
|                                  |                                            |
|      +-----------+----------+-----------+----------+-----------+              |
|      |           |          |           |          |           |              |
|      v           v          v           v          v           v              |
|   +------+   +--------+  +------+   +--------+  +------+   +--------+         |
|   | UART |   |  SPI   |  | I2C  |   | TIMER  |  | ADC  |   | GPIO   |         |
|   +------+   +--------+  +------+   +--------+  +------+   +--------+         |
|                                                                        |      |
|                                                                        v      |
|                                                                 External Pins |
|                                                                               |
|  +--------------------------------------------------------------------+       |
|  |                         CLOCK SYSTEM                               |       |
|  |  Internal RC  ->  External Crystal  ->  PLL  ->  System Clock      |       |
|  +--------------------------------------------------------------------+       |
|                                                                               |
+-------------------------------------------------------------------------------+


Flash Memory (Program Memory)

Flash stores firmware permanently.

Characteristics:

  • Non-volatile
  • Sector erase
  • Limited write cycles

Internal structure:

md
+-----------------------+
| Vector Table          |
| .text (code)          |
| .rodata               |
| Bootloader (optional) |
| Application           |
+-----------------------+

On reset:

md
Address 0x00000000 -> Initial Stack Pointer
Address 0x00000004 -> Reset Handler


SRAM (Data Memory)

SRAM is volatile and very fast.

It contains:

md
+------------------+
| Stack            |
| Heap             |
| .data            |
| .bss             |
+------------------+

Stack grows downward in most MCU:

md
High Address
    |
    |   <-- Stack grows down
    v
Low Address 

Common vulnerabilities:

  • Stack overflow
  • Buffer overflow
  • Corrupt return address

This is where many embedded exploits happen.